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MAX811TEUS Rev. A
RELIABILITY REPORT FOR MAX811TEUS PLASTIC ENCAPSULATED DEVICES
September 10, 2002
MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086
Written by
Reviewed by
Jim Pedicord Quality Assurance Reliability Lab Manager
Bryan J. Preeshl Quality Assurance Executive Director
Conclusion The MAX811T successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards. Table of Contents I. ........Device Description II. ........Manufacturing Information III. .......Packaging Information IV. .......Die Information V. ........Quality Assurance Information VI. .......Reliability Evaluation ......Attachments
I. Device Description A. General The MAX811T is a low-power microprocessor (P) supervisory circuit used to monitor power supplies in P and digital systems. It provides excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5V- powered or 3V-powered circuits. The MAX811T also provides a debounced manual reset input. This device performs a single function: It asserts a reset signal whenever the VCC supply voltage falls below a preset threshold, keeping it asserted for at least 140ms after VCC has risen above the reset threshold. The MAX811 has an active-low RESET output (which is guaranteed to be in the correct state for VCC down to 1V. The reset comparator is designed to ignore fast transients on VCC. Reset thresholds for this device is 3.08V. Low supply current makes the MAX811T ideal for use in portable equipment. This device comes in a 4-pin SOT143 package.
B. Absolute Maximum Ratings Item Terminal Voltage (with respect to GND) VCC All Other Inputs Input Current, VCC, MR Output Current, RESET or RESET Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10sec) Continuous Power Dissipation (TA = +70C) 4-Lead SOT143 Derates above +70C 4-Lead SOT143 Rating
-0.3V to 6.0V -0.3V to (VCC + 0.3V) 20mA 20mA -40C to +85C -65C to +160C +300C 320mW 4mW/C
II. Manufacturing Information A. Description/Function: B. Process: C. Fabrication Location: D. Transistor Count: D. Assembly Location: E. Date of Initial Production: 4-Pin P Voltage Monitors with Manual Reset Input S12 (SG1.2) - Standard 1.2 micron silicon gate CMOS Oregon, USA 341 Malaysia or Thailand January, 1997
III. Packaging Information A. Package Type: B. Lead Frame: C. Lead Finish: D. Die Attach: E. Bondwire: F. Mold Material: G. Assembly Diagram: H. Flammability Rating: I. Classification of Moisture Sensitivity per JEDEC standard JESD22-A112: 4-Lead SOT143 Copper Solder Plate Silver-filled Epoxy Gold (1.0 mil dia.) Epoxy with silica filler Buildsheet # 05-1701-0263 Class UL94-V0
Level 1
IV. Die Information A. Dimensions: B. Passivation: C. Interconnect: D. Backside Metallization: E. Minimum Metal Width: F. Minimum Metal Spacing: G. Bondpad Dimensions: H. Isolation Dielectric: I. Die Separation Method: 37 x 31 mils Si3N4/SiO2 (Silicon nitride/ Silicon dioxide) Aluminum/Copper/Si None 1.2 microns (as drawn) 1.2 microns (as drawn) 5 mil. Sq. SiO2 Wafer Saw
V. Quality Assurance Information A. Quality Assurance Contacts: Jim Pedicord (Reliability Lab Manager) Bryan Preeshl (Executive Director of QA) Kenneth Huening (Vice President) B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet. 0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm D. Sampling Plan: Mil-Std-105D VI. Reliability Evaluation A. Accelerated Life Test The results of the 1 35C biased (static) life test are shown in Table 1. Using these results, the Failure Rate () is calculated as follows: = 1 = MTTF 1.83 (Chi square value for MTTF upper limit) 192 x 4389 x 240 x 2 Temperature Acceleration factor assuming an activation energy of 0.8eV = 4.52 x 10-9 = 4.52 F.I.T. (60% confidence level @ 25C)
This low failure rate represents data collected from Maxim's reliability qualification and monitor programs. Maxim also performs weekly Burn-In on samples from production to assure reliability of its processes. The reliability required for lots which receive a burn-in qualification is 59 F.I.T. at a 60% confidence level, which equates to 3 failures in an 80 piece sample. Maxim performs failure analysis on rejects from lots exceeding this level. The Burn-In Schematic (Spec. # 06-4556) shows the static circuit used for this test. Maxim also performs 1000 hour life test monitors quarterly for each process. This data is published in the Product Reliability Report (RR-1M). B. Moisture Resistance Tests Maxim evaluates pressure pot stress from every assembly process during qualification of each new design. Pressure Pot testing must pass a 20% LTPD for acceptance. Additionally, industry standard 85C/85%RH or HAST tests are performed quarterly per device/package family. C. E.S.D. and Latch-Up Testing The PW67-2 die type has been found to have all pins able to withstand a transient pulse of 2500V, per Mil-Std-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA and/or 20V.
Table 1 Reliability Evaluation Test Results MAX811TEUS
TEST ITEM TEST CONDITION FAILURE IDENTIFICATION SAMPLE SIZE NUMBER OF FAILURES
Static Life Test (Note 1) Ta = 135C Biased Time = 192 hrs. Moisture Testing Pressure Pot Ta = 121C P = 15 psi. RH= 100% Time = 168hrs. Ta = 85C RH = 85% Biased Time = 1000hrs.
DC Parameters & functionality
240
0
DC Parameters & functionality
77
0
85/85
DC Parameters & functionality
77
0
Mechanical Stress Temperature Cycle -65C/150C 1000 Cycles Method 1010 DC Parameters 77 0
Note 1: Life Test Data may represent plastic D.I.P. qualification lots for the package. Note 2: Generic Package/Process Data
Attachment #1 TABLE II. Pin combination to be tested. 1/ 2/
Terminal A (Each pin individually connected to terminal A with the other floating) 1. 2. All pins except VPS1 3/ All input and output pins
Terminal B (The common combination of all like-named pins connected to terminal B) All VPS1 pins All other input-output pins
1/ Table II is restated in narrative form in 3.4 below. 2/ No connects are not to be tested. 3/ Repeat pin combination I for each named Power supply and for ground (e.g., where VPS1 is VDD, VCC, VSS, VBB, GND, +VS, -VS, VREF, etc). 3.4 a. b. Pin combinations to be tested. Each pin individually connected to terminal A with respect to the device ground pin(s) connected to terminal B. All pins except the one being tested and the ground pin(s) shall be open. Each pin individually connected to terminal A with respect to each different set of a combination of all named power supply pins (e.g., V , or V SS1 SS2 or V SS3 or V CC1 , or V CC2 ) connected to terminal B. All pins except the one being tested and the power supply pin or set of pins shall be open. Each input and each output individually connected to terminal A with respect to a combination of all the other input and output pins connected to terminal B. All pins except the input or output pin being tested and the combination of all the other input and output pins shall be open.
c.
TERMINAL C
R1 S1 R2
TERMINAL A REGULATED HIGH VOLTAGE SUPPLY
S2 C1
DUT SOCKET
SHORT CURRENT PROBE (NOTE 6)
TERMINAL B
R = 1.5k C = 100pf
Mil Std 883D Method 3015.7 Notice 8
TERMINAL D
ONCE PER SOCKET
ONCE PER BOARD
150 OHMS
300 uA + 5 VOLTS
1 2 3 4
N/C
N/C 8 N/C N/C 7 6
N/C
N/C 5
8 PIN DIP
DEVICES: MAX 705/706/707/708/709/809/811/812/813/821/ DRAWN BY: TODD BEJSOVEC 822/6314/6315/6326/6327/6328 NOTES: MS17 only for MAX 6326-28 MAX. EXPECTED CURRENT = 300 uA
DOCUMENT I.D. 06-4556
REVISION E
MAXIM TITLE: 883 BI Circuit (MAX 705/706/707/708/709/809/811/812/813/821/822/6314/6315/6326/6327/6328)
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